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HLS中的a+b,a*b实现

时间:2021/4/4 2:28:50|来源:|点击: 次

设计1 ,a+b,但是返回a*b,latency是1

#include<ap_int.h>
//typedef ap_int<16> dt;
typedef int dt;
dt add(dt a,dt b,dt *c){
#pragma HLS INTERFACE s_axilite port=return bundle=BUS_CTRL
#pragma HLS INTERFACE s_axilite port=a bundle=BUS_IN
#pragma HLS INTERFACE s_axilite port=b bundle=BUS_IN
#pragma HLS INTERFACE s_axilite port=c bundle=BUS_INOUT
   *c=a+b;
   return a*b;
}

在这里插入图片描述

设计2 ,a+b,但是返回a+b,latency是0

#include<ap_int.h>
//typedef ap_int<16> dt;
typedef int dt;
dt add(dt a,dt b,dt *c){
#pragma HLS INTERFACE s_axilite port=return bundle=BUS_CTRL
#pragma HLS INTERFACE s_axilite port=a bundle=BUS_IN
#pragma HLS INTERFACE s_axilite port=b bundle=BUS_IN
#pragma HLS INTERFACE s_axilite port=c bundle=BUS_INOUT
   *c=a+b;
   return a+b;
}

在这里插入图片描述

设计2 ,a*b,但是返回a+b,latency是2

#include<ap_int.h>
//typedef ap_int<16> dt;
typedef int dt;
dt add(dt a,dt b,dt *c){
#pragma HLS INTERFACE s_axilite port=return bundle=BUS_CTRL
#pragma HLS INTERFACE s_axilite port=a bundle=BUS_IN
#pragma HLS INTERFACE s_axilite port=b bundle=BUS_IN
#pragma HLS INTERFACE s_axilite port=c bundle=BUS_INOUT
   *c=a*b;
   return a+b;
}

在这里插入图片描述

设计2 ,ab,但是返回ab,latency是2

#include<ap_int.h>
//typedef ap_int<16> dt;
typedef int dt;
dt add(dt a,dt b,dt *c){
#pragma HLS INTERFACE s_axilite port=return bundle=BUS_CTRL
#pragma HLS INTERFACE s_axilite port=a bundle=BUS_IN
#pragma HLS INTERFACE s_axilite port=b bundle=BUS_IN
#pragma HLS INTERFACE s_axilite port=c bundle=BUS_INOUT
   *c=a*b;
   return a*b;
}

在这里插入图片描述

另外,我们还写了testbench:

#include <stdio.h>
#include "ap_axi_sdata.h"
#include<ap_int.h>
typedef int dt;
dt add(dt a, dt b,dt *c);

int main()
{
  dt a = 3;
  dt b = 4;
  dt *c ;
  add(a,b,c);


    if(*c  != (a*b)){
      printf("ERROR: HW and SW results mismatch\n");
      return 1;
    }

    else{
    	printf("Success: HW and SW results match\n");
    	return 0;
    }
}


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